Microprogrammed system having single microstep apparatus
US4387423A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 1979 |
| Grant date | Jun 7, 1983 |
| Priority date | — |
| Expiry date | Feb 16, 1999 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/406
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a data processing system which includes a central processing unit and one or more main memory units comprised of semiconductor dynamic random access memory chips, logic is provided within the system to provide for the single stepping of the central processing unit clock thereby allowing for the execution of one CPU cycle. The system logic is organized such that the memory refresh command signals, which are normally generated by the CPU, are generated by the single step logic thereby maintaining the contents of the main memory modules. The logic of the overall data processing system is organized such that most transfers of information between the main memory, the CPU and I/O controllers, to which peripheral devices are connected, may take place in the single step mode of operation without the loss of information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.