Memory mapping system
US4393443A · kind A · utility
16Cited by
7References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 20, 1980 |
| Grant date | Jul 12, 1983 |
| Priority date | — |
| Expiry date | May 20, 2000 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0292
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for enhancing the performance of a random-access-memory-based memory expansion system is disclosed. Memory capacity and a control register are added to the traditional memory mapping circuit. The increased memory is utilized to store several maps simultaneously and the circuit output is then switched from one stored map to another according to data present at the control register outputs. Thus, by pre-loading the circuit with all the memory maps required by a particular program, delay caused by map changes is reduced to the time required to move data to the control register outputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.