Patent · US Expired

Voltage monitoring arrangement for ORed power diodes

US4394647A · kind A · utility

10Cited by
9References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateSep 14, 1981
Grant dateJul 19, 1983
Priority date
Expiry dateSep 14, 2001

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R19/155
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

Each power diode in an ORed direct-current power distribution system has connected thereacross, between the respective load and source terminals of the power diode, a series connection of respective first and second light-emitting diodes (LEDs) with the LEDs being similarly poled with respect to their common connection, with the power diode and the first LED being oppositely poled with respect to the power diode load terminal, with a resistance connected between the common LED connection and the power supply return. A resistance-LED arrangement is also provided in parallel with each nonindicating fuse. The ON (fully conducting--showing detectable visible light) and OFF (not fully conducting--not showing detectable visible light) patterns of the LEDs, both under the condition of normal voltage on each power bus and under the condition where the relative voltage between buses is varied slightly, can be used for circuit failure diagnostics.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.