Prom erase detector
US4394750A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 10, 1981 |
| Grant date | Jul 19, 1983 |
| Priority date | — |
| Expiry date | Jul 10, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable transistor is provided adjacent to a programmable read only memory. A latch is used in conjunction with the programmable transistor and data is written into the latch. If the programmable transistor is programmed the output of the latch will be modified, however, if the programmable transistor is not programmed the output of the latch will not be modified when it is read. The programming pads used to program the programmable transistor are severed so they are no longer functional once the programmable transistor has been programmed. Therefore if someone erases the programmable read only meory the programmable transistor is also erased and cannot be reprogrammed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.