Dual modulus counter having non-inverting feedback
US4394769A · kind A · utility
19Cited by
2References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 15, 1981 |
| Grant date | Jul 19, 1983 |
| Priority date | — |
| Expiry date | Jun 15, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/542
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The ring counter of this invention is self-initializing and is operable at a clock frequency corresponding to four gate delays and comprises a plurality of master of slave flip-flops, in which this high speed capability is attained by using non-inverting feedback between the first and last flip-flops and by operating the master and slave of each in complementary fashion without requiring the use of a complementary clock signal. The non-inverting feedback takes advantage of the inherent delay between the response of the complementary outputs of each flip-flop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.