Bus access circuit for high speed digital data communication
US4395710A · kind A · utility
38Cited by
7References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 26, 1980 |
| Grant date | Jul 26, 1983 |
| Priority date | — |
| Expiry date | Nov 26, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/417
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A serial data communications network in which a plurality of stations communicate among one another in an orderly and collision-free manner on a single serial bus. Each station incorporates an improved bus access circuit to operate in cooperation with the bus access circuit of every other station in the network. The resulting effect as to each station is the assignment of a unique, recurring time window during which the station may initiate a transmission on the serial bus exclusive of all other stations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.