Double superheterodyne receiver
US4395777A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 8, 1981 |
| Grant date | Jul 26, 1983 |
| Priority date | — |
| Expiry date | Jan 8, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03J5/0281
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A double superheterodyne receiver has a frontend stage for receiving an RF signal, a first phase-locked loop (PLL) local oscillator circuit for generating a first local oscillator signal, a first mixer for mixing the RF signal with the first local oscillator signal to produce a first IF signal, a second PLL local oscillator circuit for generating a second local oscillator signal, a second mixer for mixing the first IF signal with the second local oscillator signal to produce a second IF signal, a detector for detecting information carried on the second IF signal and control circuitry for controlling the dividing ratios of programmable frequency dividers respectively included in the first and second PLL local oscillator circuits. To tune the receiver to a desired RF frequency, the control circuitry, which can include a micro-computer, selects the dividing ratio N.sub.1 of the first PLL local oscillator circuit and the dividing ratio N.sub.2 of the second PLL local oscillator circuit according to a predetermined scheme. The RF frequency to which the receiver is tuned is determined by the first and second local oscillator signal frequencies. In one version thereof, the second local os…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.