Universal timing array
US4398085A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 25, 1980 |
| Grant date | Aug 9, 1983 |
| Priority date | — |
| Expiry date | Nov 25, 2000 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/223
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A universal timing array (UTA) comprising a branch and increment logic circuit and multiple 2-bit counter cells is fabricated as a single large scale integrated circuit and is adapted to implementing various timing and control functions in digital computers and radar signal processors. Implementation of the UTA functional design using emitter coupled logic circuitry and special circuit design features improves UTA performance by increasing operating clock frequency, widening operating temperature range and reducing on-chip complexity. A specific embodiment utilizes a standard universal digital array chip having specially selected cell placements and interconnecting routing patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.