Read channel gate generator with self-adjusting pulse width compensator
US4398154A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 10, 1981 |
| Grant date | Aug 9, 1983 |
| Priority date | — |
| Expiry date | Apr 10, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A gate generator circuit for receiving a pulse type input data signal, wherein the locations of the pulse peaks are representative of the data, includes a comparator for comparing voltage levels of the pulses of the input signal with a reference voltage applied to the comparator so as to generate rectangular pulses, the reference voltage being varied in a controlled manner to assure that each rectangular pulse has at least a prescribed minimum time duration. A tapped delay line and logic circuits coupled to selected taps thereof respond to the rectangular pulses to produce a gating pulse signal by symmetrically expanding the rectangular pulses if the pulse widths thereof are less than or equal to a predetermined time duration and by transmitting the rectangular pulses unchanged in pulse widths if the pulse widths thereof are greater than the predetermined time duration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.