"MOS Digital-to-analog converter with resistor chain using compensating ""dummy"" metal contacts"
US4398207A · kind A · utility
19Cited by
7References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 12, 1981 |
| Grant date | Aug 9, 1983 |
| Priority date | — |
| Expiry date | May 12, 2001 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/925
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An MOS integrated circuit digital-to-analog converter employing a plurality of generally parallel resistance strings. Decoding means and switching means provide an analog output from the resistance strings, this output passes through only two switches. The resistance strings may be closely fabricated on a substrate, thereby reducing the effects of processing variations. A unique layout for the converter array minimizes the effects of masking misalignments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.