Time base correcting apparatus
US4398224A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 1, 1981 |
| Grant date | Aug 9, 1983 |
| Priority date | — |
| Expiry date | Sep 1, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/18
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Time base correcting apparatus is provided for a digital signal supplied to such apparatus in the form of successive data blocks with each data block including plural data words. A memory is provided, having plural addressable storage locations, each adapted to store a respective data block. A write address generator generates write-in addresses to address particular storage locations into which the supplied data blocks are written; and an error detector detects whether the supplied data block contains an error. If no error is detected, a write-in circuit writes that data block into the addressed storage location; but if an error is detected, the data block is inhibited from being stored. An error store also is provided to store an error flag which is, for example, reset when the nono-erroneous data block is written into the addressed storage location, and is set when an error in that data block is detected. A read address generator generates read-out addresses to address those storage locations from which storage data blocks are read. When the contents of an addressed storage location are read out, the error flag associated with that data block is set regardless of its actual cond…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.