Stored-program control machine
US4399516A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 10, 1981 |
| Grant date | Aug 16, 1983 |
| Priority date | — |
| Expiry date | Feb 10, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/223
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hierarchical organization of programmable logic arrays permits the control of microprocessor functions to be achieved in a way which allows otherwise wasted clock time to be used. The mostly independent operations of the several PLA's is organized by "handshake" signals from the latches of one PLA to those of another via AND circuits operative to selectively enable clock signals, in some instances, and data in other instances, to be applied to the latches. The use of the AND circuits enables requisite operations to be achieved with relatively small PLA's.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.