Inductive load driver protection circuits having minimal power dissipation
US4400756A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 27, 1981 |
| Grant date | Aug 23, 1983 |
| Priority date | — |
| Expiry date | Aug 27, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01H47/325
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The self-protecting load driver circuit includes an output transistor having an emitter coupled to a current sensor and a collector adapted to be coupled to the electrical load. A comparator senses the magnitude of a current sensor signal and applies trigger signals to a time delay circuit which is connected between the output of the comparator and the control terminal of a control circuit for the protected transistor. The rise time of the voltage across the current sensor depends on the inductance, for instance, of the load. The time delay circuit enables the control circuit to disable the output transistor for a predetermined time duration in response to the threshold voltage of the comparator being exceeded by the sensor voltage. At other times, the protected transistor is saturated by the control circuit so that power is delivered to the load.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.