Synchronizing device for a time division multiplex system
US4402080A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 14, 1981 |
| Grant date | Aug 30, 1983 |
| Priority date | — |
| Expiry date | Apr 14, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0608
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
In a synchronizing device for a TDM system which operates at a high speed, in order to be able to use a slower, energy-saving circuit technique, in the event of n possible phase positions, the TDM signal is split between n parallel shift registers. The outputs of the shift registers are connected to a frame code word recognition circuit. During a synchronization process, the slower-operating clock pulse train of the shift registers is delayed by the period of the received clock pulse train. As a result, the next possible phase position is checked. This procedure is repeated until the frame code word recognition circuit emits a synchronization signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.