Output stage for operational amplifier
US4403200A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 24, 1981 |
| Grant date | Sep 6, 1983 |
| Priority date | — |
| Expiry date | Aug 24, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/52
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An operational amplifier includes an input stage, an output stage including first, second and third NPN output transistors, and an intermediate stage including first and second emitter follower transistors. The first NPN output transistor sources load current to an output terminal while the second and third NPN output transistors sink load current from the output terminal. A diode is coupled across the collectors of the second and third NPN output transistors to conduct possible short circuit currents. Additionally, a pair of series coupled resistors are coupled across the collectors of the second and third NPN output transistors. A Miller capacitor is coupled between the input of the intermediate stage and the junction of the first and second resistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.