Data processing system using a high speed data channel for providing direct memory access for block data transfers
US4403282A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 1980 |
| Grant date | Sep 6, 1983 |
| Priority date | — |
| Expiry date | Apr 29, 2000 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system having a central processor unit (CPU) and a memory and further including a high speed, or "burst multiplexer", channel for permitting direct access to the memory by an input/output (I/O) device without the need to use registers and control signals from the central processor unit. The high speed channel utilizes its own memory port separate from that of the CPU and includes internal paths for transferring addresses and data between an I/O device and the memory. The channel further includes a memory allocation unit (MAP) which can be loaded by transfer of memory allocation data via substantially the same common path as the I/O data transfer. Appropriate control logic is also included to control the data and address transfers and the MAP load and dump operations so that blocks of data words can be transferred sequentially and directly to or from the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.