Programmable read only memory
US4404659A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 1980 |
| Grant date | Sep 13, 1983 |
| Priority date | — |
| Expiry date | Oct 3, 2000 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable read only memory consists of a plurality of FAMOS's having a control gate. Control gates of the plurality of FAMOS's arrayed along the same row are commonly connected to a word line, and drains of the plurality of FAMOS's arrayed along the same column are commonly connected to a bit line. Sources of the plurality of FAMOS's are commonly connected, and are connected to a ground point of the circuit via resistance means. Bit lines which are selected when the data is to be written are provided with a high voltage. Floating gates of the non-selected FAMOS's are coupled by parasitic capacity which exists between the floating gate and the drain. Therefore, when the voltage of the bit line is raised, the voltage of the floating gate is undesirably raised correspondingly. In this case, however, voltage drops across said resistance means owing to the writing current which flows through the selected FAMOS, and the potential of the commonly connected sources is raised by the drop in the voltage. Consequently, the non-selected FAMOS's are properly maintained in the non-conductive state despite the fact that the potential of the floating gate is raised as mentioned above.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.