Integrated circuit
US4404663A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 1981 |
| Grant date | Sep 13, 1983 |
| Priority date | — |
| Expiry date | Feb 13, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit wherein a gate circuit is provided on a bus line mounted on a semiconductor substrate. The gate circuit is used to separate an unused circuit block from other circuit blocks which are connected to a bus line through an input-output circuit for high speed data transmission, thereby reducing a parasitic capacity which might be imparted to the bus line by the separated circuit block. The input-output circuit is formed of a clocked inverter. The gate circuit is formed of a C.multidot.MOS transmission gate. The input-output circuit and gate circuit are so connected that where the gate of the inverter is opened, then the C.multidot.MOS transmission gate is closed; and where the gate of the inverter is closed, then the C.multidot.MOS transmission gate is opened.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.