Microprocessor providing an interface between a peripheral subsystem and an object-oriented data processor
US4407016A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 1981 |
| Grant date | Sep 27, 1983 |
| Priority date | — |
| Expiry date | Feb 18, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor receives addresses and data from a peripheral subsystem for use in subsequently accessing portions of the main memory of a data processing system in a controlled and protected manner. Each of the addresses is used to interrogate an associative memory to determine if the address falls within one of the subranges for a "window" on the main memory address space. If the address matches, then it is used to develop a corresponding address on the main memory address space. The data associated with the peripheral subsystem address is then passed through the interface and into the main memory at the translated memory address. Data transfer is improved by buffering blocks of data on the microprocessor. Data bytes are written into the buffer at a slower rate than data blocks are read out of the buffer and into main memory. A buffer bypass register allows single bytes of data to be transferred to a single address by bypassing the buffer. Address development and memory response signals are generated by the microprocessor rather than the peripheral subsystem processor for block transfers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.