Fabrication of isolation oxidation for MOS circuit
US4407696A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1982 |
| Grant date | Oct 4, 1983 |
| Priority date | — |
| Expiry date | Dec 27, 2002 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/966
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is disclosed for fabricating an isolation oxidation (44), also referred to as field oxide, to separate the active regions on the surface of an MOS integrated circuit. On the surface of a semiconductor substrate (24) there are fabricated in successive layers an oxide layer (26), a polysilicon layer (28) and a nitride layer (30). A patterned resist layer (32) is formed on the surface of the nitride layer (30). The nitride layer (30) is etched through an opening (34) in the resist layer (32), which is then removed. The isolation oxidation (44) is then grown through an opening (36) in the nitride layer (30). The isolation oxidation (44) comprises oxide derived from the oxide layer (26) and from oxide produced from the polysilicon layer (28) and the semiconductor substrate (24). Next, the nitride layer (30), the polysilicon layer (28) and the oxide layer (26) are etched. The resulting isolation oxidation (44) has a bird's-beak area (46) which is less than 50% of the width of a bird'-beak area (14) produced using conventional MOS manufacturing processes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.