Interface between a processor system and peripheral devices used in a mailing system
US4410961A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 17, 1981 |
| Grant date | Oct 18, 1983 |
| Priority date | — |
| Expiry date | Feb 17, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG07B2017/00701
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A peripheral interface board establishes a communications link between a postage value determining system processor associated with a postage scale and a plurality of peripheral devices. The interface includes a microcomputer which receives data and command signals from the system processor. A multiplexer interconnects the peripheral transmit line of the microcomputer with a selected peripheral device, while a further multiplexer interconnects the peripheral receive line of the microcomputer with the selected peripheral device. Typical mailing system peripheral devices include electronic postage meters, an electronic accounting system, a scale computer interface and a printer. In response to command signals from the system processor, the microcomputer establishes a communications link with a selected peripheral device. Communications subroutines include signal transmission and/or receipt, temporary storage of data received for communication to or from a peripheral device and communication with the system processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.