Method of controlling an apparatus, which is operated by a solid-state processor and powered by an electric mains, in case of a power failure and apparatus employing said method
US4412284A · kind A · utility
38Cited by
7References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 20, 1981 |
| Grant date | Oct 25, 1983 |
| Priority date | — |
| Expiry date | Mar 20, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1441
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method of operating a mains-powered processor-controlled electrical apparatus when the power fails and is subsequently restored and apparatus therefor. In the case of a power outage data identifying the program in progress is transferred for salvage to a memory. When power is restored and if the duration of the mains-power failure is smaller than a predetermined value, physical parameters which define the instantaneous state of the apparatus are sensed in response to an instruction from the processor in order to determine the conditions under which the program may be resumed by the apparatus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.