Method of making integrated circuits utilizing ion implantation and selective epitaxial growth
US4412868A · kind A · utility
95Cited by
8References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 23, 1981 |
| Grant date | Nov 1, 1983 |
| Priority date | — |
| Expiry date | Dec 23, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76283
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making an integrated circuit is described. The method includes providing a substrate of single crystal silicon semiconductor material having low minority carrier lifetime, forming an insulating layer of silicon dioxide overlying a major surface of the substrate, forming a plurality of apertures in the insulating layer which expose a plurality of selected portions of the major surface of the substrate, and epitaxially growing a layer of silicon on each of the selected portions of the major surfaces of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.