Fault recovery apparatus for a PCM switching network
US4413335A · kind A · utility
22Cited by
3References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 27, 1981 |
| Grant date | Nov 1, 1983 |
| Priority date | — |
| Expiry date | Nov 27, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q11/06
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
This fault recovery system determines the integrity of a duplex digital PCM switching network. The two copies of the switching network operate in synchronization and comparison of the outputs of each copy of the switching network takes place in order to detect network faults. The fault recovery mechanism is chiefly provided by inserting PCM samples from maintenance registers into the PCM data stream, through the digital switching network and trapping said PCM sample for analysis by the program. Subsequently, the logical unit corresponding to each fault is determined and a count is recorded corresponding to each unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.