Fast access non-volatile memory
US4415993A · kind A · utility
2Cited by
1References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 23, 1981 |
| Grant date | Nov 15, 1983 |
| Priority date | — |
| Expiry date | Nov 23, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3431
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory apparatus having a row and column decoder for controlling the read and write function to a transistor memory pair. A single power/chip select pad is utilized to both power the memory and select the memory chip. External control signals are applied directly to critical internal node within the memory apparatus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.