Double error correcting system in digital signal reproducing apparatus
US4416010A · kind A · utility
15Cited by
1References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 14, 1981 |
| Grant date | Nov 15, 1983 |
| Priority date | — |
| Expiry date | Apr 14, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/1809
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A double error correcting system is used in a digital signal reproducing apparatus, which is capable of correcting errors in two information vectors (information words) among a plurality of information vectors within one block by use of elements in a small number of correcting matrices and by using a memory device having a small memory capacity. A register is not required for temporarily storing the operational result obtained half-way between a plurality of performed operations. Instead, corrected information vectors are obtained from a memory circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.