Method of fabricating high density electronic circuits having very narrow conductors
US4417393A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 1, 1981 |
| Grant date | Nov 29, 1983 |
| Priority date | — |
| Expiry date | Apr 1, 2001 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/4916
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Electronics circuits having a relatively high density of relatively narrow conductors therein, are fabricated by cutting a groove into the surface of an insulating layer, as by use of laser machining apparatus and the like, for each conductor. Conductive material is placed into each groove to form each of at least one conductor on each of at least one level of the circuit. A thick film dielectric material is applied, over each insulative layer having at least one conductor embedded therein, to form insulative planes between different planes of conductor. Via interconnects are formed between conductor planes by filling a hole therebetween with conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.