Method and device for providing process and test information in semiconductors
US4419747A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 5, 1982 |
| Grant date | Dec 6, 1983 |
| Priority date | — |
| Expiry date | Feb 5, 2002 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for encoding key process and test information in semiconductors is disclosed. The invention is particularly useful in connection with byte-wide memories, but also finds application in a wide range of semiconductor devices. A plurality of programmable memory cells are juxtaposed on a semiconductor die with the circuitry which performs the primary function of the chip. The programmable memory cells are interconnected with the primary circuit in such a manner that the information programmed and stored therein can be accessed only when such access does not interfere with the operation of the primary circuit. Important product processing and test information is stored in the programmable cells such as wafer number, lot number, processing parameters, special visual and test results and manufacturing rework data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.