Field programmable logic array circuit
US4422072A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 30, 1981 |
| Grant date | Dec 20, 1983 |
| Priority date | — |
| Expiry date | Jul 30, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17708
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A field-programmable logic array (FPLA) circuit of both the single level logic type containing a programmable AND/NAND gate array and the multiple level logic type containing a programmable OR/NOR gate array responsive to data from a programmable AND/NAND gate array has the programmable capability for enabling certain device pins to switch between functioning as data output pins and data input pins. A sequential logic FPLA circuit containing the basic elements of the multiple level logic device has a plurality of JK flip-flops for on-chip data storage. Selected flip-flops may be directly loaded from pins also operable for supplying output data, may be dynamically converted to function as D-type flip-flops, or may be asynchronously preset/reset to desired logic states. These features are all controllable through on-chip programmable circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.