Thrashing reduction in demand accessing of a data base through an LRU paging buffer pool
US4422145A · kind A · utility
57Cited by
6References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 26, 1981 |
| Grant date | Dec 20, 1983 |
| Priority date | — |
| Expiry date | Oct 26, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/123
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A CPU implementable method for minimizing thrashing among concurrent processes demand page accessing a data base through an LRU page organized buffer pool. There is ascertained the set of pages over which there is looping access behavior for the prospectively executing concurrent processes. This parameter, as determined for each task, is passed to the storage accessing component which partitions the buffer into LRU stacks and dynamically adjusts the stack to this predicted parameter size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.