Differential amplifier stage having bias compensating means
US4425551A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 1981 |
| Grant date | Jan 10, 1984 |
| Priority date | — |
| Expiry date | Mar 26, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/45479
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An improved amplifier of the type comprising bipolar transistor means coupled between the input terminal of the amplifier and a differential pair of transistors. Compensation means is provided for generating a compensating signal through the bipolar transistor means such that the bipolar transistor means and compensation means reduce the amount of bias current drawn from the input signal to the amplifier. Other aspects of the present invention include the provision of reducing DC offset voltages between each side of the differential amplifier due to the operation of the device with its input terminals at different voltage levels, and the provision of a zero in the transfer characteristics of the amplifier to mitigate the effects of poles provided in the transfer characteristics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.