Method of making depthwise-oriented integrated circuit capacitors
US4427457A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 1981 |
| Grant date | Jan 24, 1984 |
| Priority date | — |
| Expiry date | Apr 7, 2001 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/901
Abstract
A depthwise-oriented capacitor comprises a cluster of separate, parallel, narrow elongated oppositely-doped conductive regions extending depthwise into a semiconductor substrate, for example, in an integrated circuit. The conductive regions can be parallel plates, but are preferably column shaped. The conductive regions are formed by ion implanting or diffusing a dopant into the substrate in a direction aligned with a crystallographic channel thereof to facilitate maximum ion penetration. P-type regions form one pole of the capacitor and N-type regions interspersed among the p-type regions form the opposite pole. Doping concentrations within the regions are sufficient to establish metal-like electric field boundary conditions. The bulk of the substrate containing the conductive regions is either near-intrinsic or semi-insulative so that the semiconductor material between the conductive regions is substantially nonconductive. The oppositely-doped regions are spaced closely enough together that the intervening nonconductive region is depleted of free carriers over the operational voltage range of the capacitor but sufficently separated that the depleted breakdown voltage of the nonco…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.