Method and apparatus for a hierarchical paging storage system
US4430701A · kind A · utility
116Cited by
8References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 3, 1981 |
| Grant date | Feb 7, 1984 |
| Priority date | — |
| Expiry date | Aug 3, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/312
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A plurality of addressable data storage devices are selectively directly accessed or accessed via a cache memory. Access via the cache memory uses one of a plurality of logical addresses; each of the data storage devices is represented by a plurality of the logical addresses. Each of the data storage devices can be reserved for direct access; such reservation does not apply to device accesses via the cache. Accesses to the devices are queued on a device basis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.