Method of forming self-aligned lateral bipolar transistor
US4435225A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 11, 1981 |
| Grant date | Mar 6, 1984 |
| Priority date | — |
| Expiry date | May 11, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A lateral bipolar transistor having a base width of 0.5 micron or less is made by forming a protective layer on an electrically insulating layer along a surface of a semiconductor body, forming an open space through the protective layer so as to define a guiding edge for it, introducing a first semiconductor dopant of a selected conductivity type into the body using the guiding edge to control the lateral extent of the first dopant, etching the insulating layer back under the protective layer a selected distance from the guiding edge, oxidizing material of the body exposed by the open space in the protective and insulating layers to form a composite electrically insulating region, removing the remainder of the protective layer, etching the insulating region sufficiently long to create an open space through it and thereby define another guiding edge, and introducing a second semiconductor dopant of the selected conductivity type into the body using this second guiding edge to control the lateral extent of the second dopant toward the first dopant and thereby to control the resulting base width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.