Data processing system with high density arithmetic and logic unit
US4435782A · kind A · utility
12Cited by
3References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 1981 |
| Grant date | Mar 6, 1984 |
| Priority date | — |
| Expiry date | Jun 29, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/3896
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-stage, multi-function, arithmetic and logic unit for a data processing system is formed with only a small number of components. Some of the functions (Sum and Exclusive OR) are performed within each stage. For other functions (AND and OR), some of the components of one stage cooperate with different components of the next stage in an arrangement that reduces the total number of components for each stage. For these functions, the output appears shifted one bit position to the left and is then re-shifted one bit position to the right by a conventionally available shifter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.