Semiconductor memory device with dummy word line/sense amplifier activation
US4435793A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 30, 1982 |
| Grant date | Mar 6, 1984 |
| Priority date | — |
| Expiry date | Apr 30, 2002 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device is provided, including a plurality of MOS memory cells arranged in a matrix fashion, word lines for selectively transferring an access signal to the MOS memory cells, plural pairs of data lines for effecting data transfer with resepct to the MOS memory cells, sense amplifiers connected to the plural pairs of data lines to amplify data signals on the data lines, and a clock pulse generator connected to produce a clock pulse for activating the sense amplifiers. The memory device further includes a dummy word line arranged in the same manner as the word lines, and a dummy decoder connected to energize the clock pulse generator through the dummy word line so that the clock pulse generator produces a clock pulse to activate the sense amplifiers for preset period of time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.