Multiwork memory data storage and addressing technique and apparatus
US4438493A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 1981 |
| Grant date | Mar 20, 1984 |
| Priority date | — |
| Expiry date | Jul 6, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A technique and apparatus for storing data and addressing stored data in a memory from which multiple words of data are to be retrieved in parallel is disclosed. The memory is addressed by providing the address of the first of N consecutive words to be retrieved in parallel. The data is stored in memory in physical data words which contain N logical data words such that the addressing of one physical data word will result in N logical data words being read in parallel from the memory. Each physical data word contains the contents of the logical data word having the same address as that of the physical data word in its leftmost position followed in the next right position by the contents of the logical data word having the next higher address, and so on until the rightmost position of the physical data word contains the contents of the logical data word with an address equal to the physical data word address plus N-1. This results in the contents of each logical data word being stored N times in the memory, but eliminates the need for data alignment as the N logical data words are read in parallel from the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.