Method and apparatus for verifying storage apparatus addressing
US4438512A · kind A · utility
27Cited by
3References
11Claims
0Family size
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Key dates
| Filing date | Sep 8, 1981 |
| Grant date | Mar 20, 1984 |
| Priority date | — |
| Expiry date | Sep 8, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/023
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a data storage system employing sequential data transfers for blocks of data bytes, an address offset is induced in the addressing mechanism such that each block transfer requires loading the address mechanism with an address of a block to be accessed. Address offset is preferably induced by inserting a blank register between adjacent blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.