Low loop current switch latch circuit
US4439637A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 28, 1981 |
| Grant date | Mar 27, 1984 |
| Priority date | — |
| Expiry date | Dec 28, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M1/76
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A low loop current switch latch circuit (10) monitors a residual current which is derived from a telephone line and is proportional to the current drawn by a telephone subscriber circuit. Bipolar transistors (20, 26) are connected to produce a proportional current to the residual current. A current mirror circuit includes a master transistor (30) and a slave transistor (32). The proportional current is drawn through the master transistor (30). The current produced by the slave transistor (32) is provided to a node (33). A constant power source (36) provides a constant current to a node (39). A pair of cross-coupled transistors (40, 46) are connected to the nodes (33, 39) such that the cross-coupled transistors are set to first and second states as a function of the current derived from the slave transistor (32). A bias current transistor (52) is activated by the cross-coupled transistors (40, 46) to draw a preset biased current from an amplifier (60), thereby changing the amplifier from a first gain to a second gain condition. The circuit (10) therefor sets the gain of the amplifier (60) through switching action utilizing hysteresis, the switching being a function of the amplitude …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.