Semiconductor memory devices
US4439841A · kind A · utility
6Cited by
1References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 10, 1981 |
| Grant date | Mar 27, 1984 |
| Priority date | — |
| Expiry date | Jun 10, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a semicondcutor memory device there is provided a specific layout of each element effectively excluding a number of "bridge" crossings for specific lines connecting the elements particularly buffer circuits and a decoder circuit, and thereby reducing the amount of resistance in the lines connecting specific elements, and increasing the signal transmission speed in the specific lines. A control circuit is arranged either beneath or above a portion of the ground line or the electric power line and the control circuit is connected to either of these lines by further vertical lines, thereby eliminating certain bridges.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.