Noise reduction circuit
US4441084A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 1981 |
| Grant date | Apr 3, 1984 |
| Priority date | — |
| Expiry date | Sep 8, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G9/025
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A noise reduction circuit for use in an audio signal recording/reproducing apparatus is comprised of a first signal path including a voltage-controlled amplifier for amplifying a signal supplied thereto with controllable gain and integrating circuit for integrating at least that portion of the signal passing through the voltage-controlled amplifier within the audio range; a level detecting circuit for controlling the gain of the voltage-controlled amplifier in response to the level of the signal passing through the voltage-controlled amplifier; a feedforward resistor connected in parallel with the first signal path for providing a lower limit to the gain imparted to the signal supplied to the noise reduction circuit; an adder circuit for adding the output signals from the first signal path and the feedforward resistor; a second resistor or a low-pass filter connected as a negative feedback path between the output of the adder circuit and the input of the first signal path for providing an upper limit to the gain imparted to the signal supplied to the noise reduction circuit; and an anti-limiting circuit connected in parallel with the first signal path for compensating the signal su…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.