Simple amplifying system for a dense memory array
US4445201A · kind A · utility
37Cited by
10References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 30, 1981 |
| Grant date | Apr 24, 1984 |
| Priority date | — |
| Expiry date | Nov 30, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system is provided in which two load devices connected to a latch are individually controlled and connected to a common input/output line. A bit/sense line is connected to each of two nodes on the latch. By providing two such latches each with bit/sense lines and two individually controlled load devices connected to the common input/output line, two cells of a word line may be sensed simultaneously.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.