Amplifier having reduced power dissipation and improved slew rate
US4446443A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 20, 1982 |
| Grant date | May 1, 1984 |
| Priority date | — |
| Expiry date | May 20, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/34
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integratable amplifier is disclosed for developing a high level output signal with reduced power dissipation. The amplifier includes a first circuit (108, 110) which responds to an input signal for developing first and second signal currents whose amplitudes increase and decrease, respectively, in response to an input signal transition of a given direction. A second circuit (32a) receives the first signal current for establishing a third signal current which mirrors the first signal current. The second and third signal currents are received by a third circuit (70a) for conversion thereof to an amplified output signal. To stabilize the gain of the amplifier, a negative feedback path (50a) is coupled between the input signal and the output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.