Emulator control sequencer
US4447876A · kind A · utility
18Cited by
3References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 30, 1981 |
| Grant date | May 8, 1984 |
| Priority date | — |
| Expiry date | Jul 30, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3879
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An emulator control sequencer comprises a programmable state machine which passively monitors the data bus of an emulator microprocessor, extracts certain information indicative of internal processor behavior, such as when the next opcode fetch will occur, as well as detecting current opcodes, and generates control signals for the emulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.