Digital logic buffer for converting single polarity analog signals to dual polarity analog signals
US4450365A · kind A · utility
7Cited by
2References
2Claims
0Family size
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Key dates
| Filing date | Sep 14, 1981 |
| Grant date | May 22, 1984 |
| Priority date | — |
| Expiry date | Sep 14, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital logic buffer device for generating dual polarity analog signals is described. In the presently preferred embodiment, buffer receives the positive polarity analog output of a digital-to-analog converter (V.sub.DAC), and a sign bit. If the sign bit indicates that a positive polarity is required, the buffer will output approximately V.sub.DAC. If a negative polarity is required, aproximately -V.sub.DAC will be generated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.