Patent · US Expired

Manufacturing TaSi-polysilicon conductors having high-resistance elements by a liftoff technique

US4451328A · kind A · utility

27Cited by

7References

3Claims

0Family size

Assignee

Societe pour l'Etude et la Fabrication de Circuits Integres Speciaux E.F.C.I.S. · FR

Inventor

Guy Dubois · Waterloo, BE

Key dates

Filing date	Sep 27, 1982
Grant date	May 29, 1984
Priority date	—
Expiry date	Sep 27, 2002

Classification

Technology area (CPC H)Electricity
CPC primaryH01L21/0272
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A process for manufacturing high-resistance elements for integrated circuits, in which the resistors are positioned on a layer of silica covering an integrated circuit, in a polycrystalline silicon zone possessing high resistivity, current supply lines being formed of a layer of polycrystalline silicon possessing low resistivity, surmounted by a layer of tantalum silicide. Plugs of photosensitive resin, deposited on a layer of polycrystalline silicon, are used to mark out a zone where the resistor is to be positioned, from zones in which resistivity is reduced by doping, and also to "lift-off" the layer of tantalum silicide on top of the resistor position.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.