Loop length compensation circuit
US4453037A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 28, 1981 |
| Grant date | Jun 5, 1984 |
| Priority date | — |
| Expiry date | Dec 28, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M1/76
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A compensation circuit (10) controls the gain of transmit and receive amplifiers (47), (49) as a function of a residual input current (I.sub.res). Circuit (10) includes a constant current source (24) which is connected to produce mirrored constant currents in transistors (26) and (28). The residual current is passed through a resistor (R.sub.loop) to produce a reference voltage. The constant current from the transistor (26) is divided with the first part of the current passing through the resistor (R.sub.loop) and the second part of the current passing through a resistor (50) and a transistor (54). The transistor (54) is connected in a mirror configuration with a transistor (58). When the residual current increases, the current mirrored to transistor (58) decreases. A transistor (32) is connected in parallel with the transistor (58) to receive the remaining current from the transistor (28) which is not drawn by the transistor (58). The transistor (32) serves as the master side of a mirror circuit having slave transistors (38) and (42). The current mirrored to the transistors (38), (42) is drawn from the amplifiers (47), (49) wherein the current through the amplifiers is proportiona…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.