Utilizing controlled illumination for creating or removing a conductive layer from a SiO.sub.2 insulator over a PN junction bearing semiconductor
US4454004A · kind A · utility
1Cited by
4References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 28, 1983 |
| Grant date | Jun 12, 1984 |
| Priority date | — |
| Expiry date | Feb 28, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A new phenomenon in integrated circuit etch processing is presented, explained and utilized to permit better removal of layers overlying integrated circuit structures, and if desired, the formation of conductive layers on such structures by a less complicated and lower temperature process than has been possible by conventional techniques.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.