Digital gain control system
US4464723A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 31, 1981 |
| Grant date | Aug 7, 1984 |
| Priority date | — |
| Expiry date | Dec 31, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N9/68
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A variable gain control system for a digital signal is provided in which the digital signal addresses a digital memory to produce an output signal representative of the addressing signal modified by a transfer characteristic. A control word M is repetitively loaded into an M counter, which counts to a predetermined limit to produce output pulses when the limit is reached. The output pulses increment a data counter. Concurrently, an N control word is repetitively loaded into an N counter, which also counts to a predetermined limit to produce output pulses when that limit is reached. The output pulses of the N counter increment an address counter. When the count of the address counter changes, the current value of the data counter is loaded into a digital memory at the address provided by the address counter. The memory is loaded in this manner to store a data array representative of a signal gain related to the ratio of the N to M.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.