Flexible logic transfer and instruction decoding system
US4467417A · kind A · utility
2Cited by
5References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 16, 1981 |
| Grant date | Aug 21, 1984 |
| Priority date | — |
| Expiry date | Sep 16, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/325
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A logic control system is disclosed for accommodating the flow of both procedural information and CPU (central processing unit) instructions from a central memory system to a CPU without compromising memory bandwidths or CPU execution speeds because of transfer delays or timing variances. Instruction modifications and plural task assignments are accommodated during instruction execution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.